SGS-THOMSON Manuals

SGS-THOMSON L7800 SERIES Manual

The L7800 series of positive voltage regulators features high output current and multiple output voltage options, making it suitable for a wide range of applications. They have internal current limiting, thermal shutdown, and safe area protection, making them essentially indestructible. They can provide local on-card regulation, eliminating the distribution problems associated with single point regulation. Additionally, they can be used with external components to achieve adjustable voltages and currents.

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SGS-THOMSON VIPer31SP handbook

VIPer31SP is an IC chip that combines PWM control and high-voltage power MOSFET. Its features include output current regulation, fixed switching frequency, auxiliary voltage regulation, soft start and shutdown control, automatic burst mode operation, etc.

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SGS-THOMSON VIPer31SP Manual

VIPer31SP is a primary IC for battery chargers, with a 600V/1A rated voltage and current. It integrates a PWM controller and MOSFET, and supports constant current and constant voltage output. It also supports soft start and shut down control, as well as automatic burst mode operation, meeting the 'Blue Angel' standard (total power consumption less than 1W).

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SGS-THOMSON OP07C handbook

The OP07C is a very high precision op amp with an offset voltage maximum of 150µV. Offering also low input current (1.8nA) and high gain (400V/mV), the OP07C is particularly suitable for instrumentation applications.

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SGS-THOMSON M54HC02 M74HC02 Manual

M54HC02 M74HC02 is a high performance CMOS four-input NOR gate with a working voltage range of 2V to 6V, low power consumption, high noise immunity and stable output.

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SGS-THOMSON M54HCT02 M74HCT02 Manual

M54/74HCT02 is a high performance, low power CMOS quad 2-input NOR gate with fully compatible with 54/74 LSTTL logic family

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SGS-THOMSON IMSA110 Manual

IMSA110 is a 1-D/2-D software configurable convolution/filter. It has the following features: programmable line delays, 8-BIT data and 8.5-BIT coefficient slices, 21 multiply-and-accumulate stages, 1-D (21) or 2-D (3 x 7) convolution window, data transformation post processor, fully cascadable in window size and accuracy, 20 MHZ data throughput (420 MOPS), signed/unsigned data and coefficients, microprocessor interface, high speed CMOS implementation, TTL compatible, single +5V ± 10% supply, power dissipation <2.0 watts, 100 pin ceramic PGA.

File format: PDF Size:583 KB

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