MOTOROLA Manuals

The MC10ELT/100ELT21 is a differential signal converter that is used to convert PECL signals and TTL signals

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The MC10ELT/100ELT20 is a TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the single gate of the ELT20 makes it ideal for those applications where space, performance and low power are at a premium. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT20 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.

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The MC100LVEL/EL91 is a triple PECL to ECL translator. It receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard voltage PECL signals and translates them to differential ECL output signals. Supports low voltage operation with 620ps typical propagation delays. Supports standard voltage operation with 670ps typical propagation delays. Fully differential design. 20-lead SOIC packaging.

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The MC100LVEL/EL91 is a triple PECL to ECL translator. The MC100LVEL91 receives low voltage PECL signals and translates them to differential ECL output signals. The MC100EL91 receives standard voltage PECL signals and translates them to differential ECL output signals. It has features such as low voltage operation, typical propagation delays of 620ps for MC100LVEL91 and 670ps for MC100EL91, fully differential design, and 20-lead SOIC packaging. It also has a VBB output for interfacing with single-ended PECL signals and requires three power rails for level translation. The D input is biased in open input conditions.

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The MC100LVEL/EL90 is a triple ECL to PECL translator. The device receives either standard or low voltage differential ECL signals and translates them to either standard or low voltage differential PECL output signals. The LVEL device can handle the low voltage signals while the EL device is designed for the standard signals. It is possible to have low voltage signals on one side and standard signals on the other if the LVEL90 is used.

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The MC100LVEL/EL90 is a triple ECL to PECL translator that receives standard or low voltage differential ECL signals and translates them to standard or low voltage differential PECL output signals.

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The MC100LVEL59 is a triple 2:1 multiplexer with differential outputs. The MC100EL59 is pin and functionally equivalent to the MC100LVEL59 but is specified for operation at the standard 100E ECL voltage supply. The output data of the muxes can be controlled individually via the select inputs or as a group via the common select input. The flexibile selection scheme makes the device useful for both data path and random logic applications.

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This datasheet introduces the features and characteristics of MC100LVEL59, including voltage supply, output data, and pin names.

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The MC100ELT23 is a dual differential PECL to TTL translator. It has 3.5ns typical propagation delay, differential PECL inputs, small outline SOIC package, 24mA TTL outputs and flow through pinouts.

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This datasheet introduces the working principle of MC74AC259/74ACT259 8-bit addressable latch, which is a high-speed latch for general purpose storage applications in digital systems

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The MC74AC258/74ACT258 is a quad 2-input multiplexer with 3-state outputs. It selects four bits of data from two sources under control of a common Select input. The four outputs present the selected data in the complement (inverted) form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with bus-oriented systems.

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MC74AC257/74ACT257 is a quad 2-input multiplexer with 3-state outputs. It selects four bits of data from two sources under control of a Common Data Select (S) input.

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The datasheet details the functions and features of the MC74AC256/74ACT256 dual addressable latch, including operating modes, pin definitions, logic symbols, and application circuits.

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The MC74AC253/74ACT253 is a dual 4-input multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH on the respective Output Enable (OE) inputs, allowing the outputs to interface directly with bus oriented systems. Multifunctional Capability, Noninverting 3-State Outputs, Outputs Source/Sink 24 mA, ′ACT253 Has TTL Compatible Inputs.

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The MC74AC251/74ACT251 is a high-speed 8-input digital multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. It can be used as a universal function generator to generate any logic function of four variables. Both true and complementary outputs are provided.

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The MC74AC244/74ACT244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter/receiver which provides improved PC board density.

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The MC74AC241/74ACT241 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density.

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MC74AC20/MC74ACT20 is a dual 4-input NAND gate. The two models differ in that MC74ACT20 has TTL compatible inputs. The device operates over a supply voltage range of -0.5~+7V, with input current of -20mA and output current of 24mA.

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