INTEL Manuals

Intel Portable Capture Station User Guide

This manual introduces the features and characteristics of Intel® Matrix Storage Manager product, and how to use this product

File format: PDF Size:1470 KB

Intel C++ Compiler for Linux* Systems User's Guide

Intel® C++ Compiler User's Guide introduces the features and benefits of Intel® C++ Compiler, and how to use the product.

File format: PDF Size:2720 KB

Intel(R) Itanium(R) Assembler User's Guide

Introduces the use of Intel(R) Itanium(R) Assembler

File format: PDF Size:462 KB

Intel 845 Chipset Family Motherboard USER S MANUAL

This manual introduces the Intel 845 Chipset Family Motherboard, supporting Pentium 4 processors, and provides detailed information on its features and innovative onboard functions.

File format: PDF Size:658 KB

Intel Math Kernel Library for Linux* OS User Guide

This manual describes the Intel® Math Kernel Library for Linux* OS. It provides information on the concepts, installation, configuration, use and maintenance of Intel® Math Kernel Library (Intel® MKL). This manual also provides example code and LINPACK and MP LINPACK benchmarks.

File format: PDF Size:1094 KB

Intel 600SM PCI Phone Adapter User Guide

File format: PDF Size:0 KB

Intel Rapid Start Guide

This document introduces the system requirements and configuration steps of Intel Rapid Start technology. The technology requires Windows 7 SP1 operating system and SSD hard drive with a larger capacity than the system memory. In addition, the Intel Rapid Start feature needs to be enabled in the BIOS settings, and only AHCI and RAID modes are supported. The main storage disk partition needs to be created in the disk management tool, and the Intel Rapid Start dedicated disk partition needs to be specified using the DiskPart command line options. Finally, the Intel Rapid Start technology should be enabled in the BIOS settings, and the corresponding application should be installed.

File format: PDF Size:2153 KB

Intel Rapid Start Manual

Intel Rapid Start Technology is a solid-state disk acceleration technology that can make the system startup faster, consume less power when the system is turned off, and load programs faster when the system is turned on.

File format: PDF Size:1951 KB

Intel LXT9785 Intel LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers Datasheet

Intel® LXT9785 and Intel® LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers Datasheet

File format: PDF Size:1561 KB

intel REFERENCE ONLY 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY

This document provides a detailed overview of the Intel 28F002B 16-KB 3.3 V serial Flash memory device features and operation.

File format: PDF Size:621 KB

intel 28F020 2048K (256K X 8) CMOS FLASH MEMORY

Intel's 28F020 CMOS flash memory offers the most cost-effective and reliable alternative for read/write random access nonvolatile memory. The 28F020 adds electrical chip-erasure and reprogramming to familiar EPROM technology. Memory contents can be rewritten: in a test socket; in a PROM-programmer socket; on-board during subassembly test; in-system during final test; and in-system after sale. The 28F020 increases memory flexibility, while contributing to time and cost savings. The 28F020 is a 2048-kilobit nonvolatile memory organized as 262,144 bytes of eight bits. Intel's 28F020 is offered in 32-

File format: PDF Size:864 KB

intel MCS@51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS

MCS@51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS are microcontrollers optimized for control applications. They have high performance, internal timers/event counters, a 2-level interrupt priority structure, 32 I/O lines, and 64KB external program memory space, among other features.

File format: PDF Size:719 KB

Intel LXT9785 Intel LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers handbook

The Intel® LXT9785 and Intel® LXT9785E are 8-port Fast Ethernet PHY Transceivers supporting IEEE 802.3 physical layer applications at 10 Mbps and 100 Mbps. These devices provide Serial/Source Synchronous Serial Media Independent Interfaces (SMII/SS-SMII) and Reduced Media Independent Interface (RMII) for switching and other independent port applications. The LXT9785 and LXT9785E are identical except for the IP telephony features included in the LXT9785E transceiver. The LXT9785E is an enhanced version of the LXT9785 that detects Data Terminal Equipment (DTE) requiring power from the switch over a CAT5 cable. The system uses the information collected by the LXT97985E to apply power if the DTE at the far end requires power over the cable, such as an IP telephone. Each network port can provide a twisted-pair (TP) or Low-Voltage Positive Emitter Coupled Logic (LVPECL) interface. The twisted-pair interface supports 10 Mbps and 100 Mbps (10BASE-T and 100BASE-TX) Ethernet over twisted-pair. The LVPECL interface supports 100 Mbps (100BASE-FX) Ethernet over fiber-optic media. The LXT9785/LXT9785E provides three discrete LED driver outputs for each port. The devices support both half-duplex and full-duplex operation at 10 Mbps and 100 Mbps and require only a single 2.5 V power supply.

File format: PDF Size:2075 KB

Intel Server Board S5000VSA User Guide

This document provides the user's guide for Intel® Server Board S5000VSA, intended for technically qualified assemblers. The document includes detailed information about the product, including disclaimers, technical specifications, and features.

File format: PDF Size:693 KB

Intel Boot Agent User Guide

This is an Intel ® Boot Agent User's Guide

File format: PDF Size:152 KB

intel 85C220/85C224-100 -80 -66 Manual

This is an article about P85C220-10

File format: PDF Size:512 KB

intel 80960JD EMBEDDED 32-BIT MICROPROCESSOR

80960JD is a 32-bit embedded microprocessor. It is pin/code compatible with all 80960Jx processors, has high-performance embedded architecture, two caches, high bandwidth burst bus and many new instructions.

File format: PDF Size:1552 KB

intel 21555 Non-Transparent PCI-to-PCI Bridge Datasheet

This data sheet provides details on the features of the 21555 non-transparent PCI-to-PCI bridge, including compliance with the PCI local Bus Specification, Revision 2.2, PCI Power Management, Vital Product Data (VPD) support, CompactPCI Distributed Hot-Swap support, 3.3-V operation with 5.0-V tolerant I/O, selectable asynchronous or synchronous primary and secondary interface clocks, concurrent primary and secondary bus operation, Advanced Configuration Power Interface (ACPI) specification, PCI Bus Power Management specification, queuing of multiple transactions in either direction, 256 bytes of posted write (data and address) buffering in each direction, 256 bytes of read data buffering in each direction, four delayed transaction entries in each direction, two dedicated I2O delayed transaction entries, two sets of standard PCI Configuration registers corresponding to the primary and secondary interface; each set is accessible from either the primary or secondary interface, direct offset address translation for downstream memory and I/O transactions, hardware enable for secondary bus central functions, IEEE Standard 1149.1 boundary-scan JTAG interface, four primary interface base address configuration registers for downstream forwarding, with size and prefetchability programmable for all four address ranges, three secondary interface address configuration registers specifying local address ranges for upstream forwarding, with size and prefetchability programmable for all three address ranges.

File format: PDF Size:485 KB

Intel StrataFlash Embedded Memory (P30) handbook

Intel StrataFlash® Embedded Memory (P30) 1-Gbit P30 Family Datasheet is the latest generation of Intel embedded flash memory devices. The product features high density, high speed, low cost, support for code and data storage, and reliable security options.

File format: PDF Size:1610 KB

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