ATMEL PC107A Preliminary Specification alpha Site Data Sheet

The PC107A PCI Bridge/Integrated Memory Controller features a processor bus frequency of up to 100 MHz, a 64-bit or 32-bit data bus, and a 32-bit address bus. It supports asynchronous SRAM, burst SRAM, or pipelined burst SRAM. It is compliant with PCI Specification, Revision 2.1 and operates at up to 66 MHz/5.0V. It also complies with the IEEE 1149.1 standard for JTAG boundary-scan interface. The controller offers power-saving modes such as Nap, Doze, and Sleep. It includes a two-channel integrated DMA controller, a message unit with intelligent I/O, an Inter-Integrated Circuit controller, and an embedded programmable interrupt controller with five hardware interrupts or 16 serial interrupts.

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Brand: ATMEL

File format: PDF

Size: 373 KB

MD5 Checksum: 40BC16903C2781E0DB7C543B9DE7F058

Publication date: 11 June, 2012

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PDF Link: ATMEL PC107A Preliminary Specification alpha Site Data Sheet PDF