National Semiconductor DS90CF581 LVDS Transmitter 24-Bit Color Flat Panel Display (FPD) Link handbook
Update: 28 September, 2023
The DS90CF581 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 40 MHz, 24 bits of RGB data and 4 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY, CNTL) are transmitted at a rate of 280 Mbps per LVDS data channel. Using a 40 MHz clock, the data throughput is 140 Megabytes per second. This transmitter is intended to interface to any of the FPD Link receivers. The chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.
Brand: National
File format: PDF
Size: 206 KB
MD5 Checksum: 2C97682D68F83125FF047605A1E63846
Publication date: 04 July, 2012
Downloads: -