intersil HCTS138MS handbook
Update: 30 September, 2023
The HCTS138MS is an Intersil radiation hardened 3-to-8 line decoder/demultiplexer. Outputs are active in the low state. Two active low and one active high enables (E1, E2, E3) are provided. If the device is enabled, the binary inputs (A0, A1, A2) determine which one of the eight normally high outputs will go to a low logic level. The HCTS138MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS138MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Brand: intersil
File format: PDF
Size: 303 KB
MD5 Checksum: EFE0616ABC79070C74E21F8CD51C968A
Publication date: 11 June, 2012
Downloads: -
PDF Link: intersil HCTS138MS handbook PDF